/*****************************************************************************/
/*                                                                           */
/*    Domino Operation System Driver Module                                  */
/*                                                                           */
/*    Copyright (C) 2011 Laszlo Arvai                                        */
/*                                                                           */
/*    ------------------------------------------------------------------     */
/*    MCP3422/3/4 18-bit multi channel ADC driver                            */
/*****************************************************************************/

#ifndef __drvMCP342x_h
#define __drvMCP342x_h

///////////////////////////////////////////////////////////////////////////////
// Includes
#include <krnlTypes.h>

///////////////////////////////////////////////////////////////////////////////
// Constants

// I2C address for drvMCP3422 - base address for drvMCP3424
#define drvMCP342x_BASE_ADDRESS 0x68
 
// fields in configuration register
#define drvMCP342x_GAIN_MASK 0X03 // PGA field
#define drvMCP342x_GAIN_X1    0X00 // PGA gain X1
#define drvMCP342x_GAIN_X2    0X01 // PGA gain X2
#define drvMCP342x_GAIN_X4    0X02 // PGA gain X4
#define drvMCP342x_GAIN_X8    0X03 // PGA gain X8

#define drvMCP342x_RES_MASK  0X0C // resolution/rate field
#define drvMCP342x_RES_SHIFT  2    // shift to low bits
#define drvMCP342x_12_BIT     0X00 // 12-bit 240 SPS
#define drvMCP342x_14_BIT     0X04 // 14-bit 60 SPS
#define drvMCP342x_16_BIT     0X08 // 16-bit 15 SPS
#define drvMCP342x_18_BIT     0X0C // 18-bit 3.75 SPS

#define drvMCP342x_CONTINUOUS 0X10 // 1 = continuous, 0 = one-shot
#define drvMCP342x_ONE_SHOT		0x00

#define drvMCP342x_CHAN_MASK 0X60 // channel field
#define drvMCP342x_CHANNEL_1  0X00 // select MUX channel 1
#define drvMCP342x_CHANNEL_2  0X20 // select MUX channel 2
#define drvMCP342x_CHANNEL_3  0X40 // select MUX channel 3
#define drvMCP342x_CHANNEL_4  0X60 // select MUX channel 4

#define drvMCP342x_START      0X80 // write: start a conversion
#define drvMCP342x_BUSY       0X80 // read: output not ready

///////////////////////////////////////////////////////////////////////////////
// Function prototypes
void drvMCP342xInit(void);
dosBool drvMCP342xSetConfiguration(dosByte in_address, dosByte in_configuration_byte);

#endif
